`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2023/11/26 10:24:42
// Design Name: 
// Module Name: rv_config
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


`define INST_LOAD   5'b00_000
`define INST_OP_IMM	5'b00_100
`define INST_AUIPC	5'b00_101
`define INST_STORE	5'b01_000
`define INST_OP	    5'b01_100
`define INST_LUI	5'b01_101
`define INST_BRANCH	5'b11_000
`define INST_JALR	5'b11_001
`define INST_JAL	5'b11_011
`define INST_SYSTEM	5'b11_100

`define DMEM_LOW_ADDR 32'd32768 //32K
`define DMEM_HIGH_ADDR 32'd65536 //64K 
//CSR func3
`define CSRRW   3'b001
`define CSRRS   3'b010
`define CSRRC   3'b011
`define CSRRWI  3'b101
`define CSRRSI  3'b110
`define CSRRCI  3'b111

//Stand CSR Registers
`define CSR_CYCLE 12'hc00
`define CSR_CYCLEH 12'hc80

//CSR Registers for thread
`define CSR_THREAD_ID	12'h800
`define CSR_THREAD_STATE	12'h801
`define CSR_THREAD_SIG	12'h802
`define CSR_THREAD_WAIT_PARA	12'h803
`define CSR_THREAD_WAIT	12'h804
`define CSR_RV_FLAG 12'h805

`define THREAD_NUM 4


